Terminus Circuits offers best-in-class PHY IP for PCI Express Gen 5/4/3/2/1. The PHY is designed for low latency, low power, small form factor, high interface speeds intended for high performance ...
which are designed to support all required features of the PCIe 5.0 32GT/s(Gen5), PCIe 4.0 16GT/s(Gen4), 3.1 8GT/s(Gen3), 2.1 5GT/s(Gen2) and 1.1 2.5GT/s(Gen1), compliant with latest PIPE ...
Leading the display is the new PS5028-E28 PCIe Gen5 SSD controller, built on TSMC’s advanced 6nm process node to enable a market-first sequential speed combination of 14.5GB/s read/write ...
This week, the company cemented its lead by introducing its next-generation PCIe 5.0 SSD controller for the best high-end SSDs, the PS5028-E28. The new chip promises even higher performance and ...