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FPGA-based portable SDR receiver

FPGA-based portable SDR receiver

The device is based on Altera(Intel) Cyclone IV EP4CE6 FPGA, 10-bit 20 MSPS ADC and a 640x360 LCD. Most of the DSP including FFT is done in hardware, the rest is handled with a NIOS II/f processor. More info at EEVBlog forum: http://www.eevblog.com/forum/projects/fpga-based-shortwave-sdr-receiver/

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Images from the ISS and Listening to Hams with the RTL-SDR | Toptal®

Images from the ISS and Listening to Hams with the RTL-SDR | Toptal®

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More Software-Defined Radio Projects Using DragonOS

More Software-Defined Radio Projects Using DragonOS

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An Introductory Project for Software Defined Radio - Projects

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